Bug 11071 – REX.R and REX.W prefixes do not seem to be generated in some cases

Created attachment 1250 test suite, all should compile successfully For some reason the following code in an asm block compiles mov RAX,0x1ffffffffUL; and RAX,0xffffffffUL; or RAX,0xffffffffUL; xor RAX,0xffffffffUL; add RAX,0xffffffffUL; adc RAX,0xffffffffUL; sub RAX,0xffffffffUL; sbb RAX,0xffffffffUL; cmp RAX,0xffffffffUL; imul RAX,0xffffffffUL; test RAX,0xffffffffUL; even though its disassembly (below) does not have REX prefixes. mov RAX,01FFFFFFFFh and EAX,0FFFFFFFFh or EAX,0FFFFFFFFh xor EAX,0FFFFFFFFh add EAX,0FFFFFFFFh adc EAX,0FFFFFFFFh sub EAX,0FFFFFFFFh sbb EAX,0FFFFFFFFh cmp EAX,0FFFFFFFFh imul EAX,RAX,0FFFFFFFFFFFFFFFFh test EAX,0FFFFFFFFh However, the following code fails to compile. The problem occurs for all generic registers (RAX .. RDX R8 .. R15). mul RAX,0xffffffffUL; div RAX,0xffffffffUL; idiv RAX,0xffffffffUL; and RAX,0x1ffffffffUL; or RAX,0x1ffffffffUL; xor RAX,0x1ffffffffUL; add RAX,0x1ffffffffUL; adc RAX,0x1ffffffffUL; sub RAX,0x1ffffffffUL; sbb RAX,0x1ffffffffUL; cmp RAX,0x1ffffffffUL; mul RAX,0x1ffffffffUL; imul RAX,0x1ffffffffUL; div RAX,0x1ffffffffUL; idiv RAX,0x1ffffffffUL; test RAX,0x1ffffffffUL;

Created attachment 1251 instructions that compile successfully (up to line 166) Generated using obj2asm.

Just looking for patterns in the disassembly. It is interesting that all instructions (other than move) encode RAX as EAX. Also, the 64-bit immediate values are trimmed accordingly to 32-bit values ("0FFFFFFFFh") for RAX. For the registers RBX through R15, the instructions "and", "or", "xor", and "test" all convert every immediate to 32-bits. The other non-move instructions, however, convert the original value of "0x1ffffffffUL" to "0FFFFFFFFFFFFFFFFh". This sign-extension is not what I was intending, as the value was designated unsigned long, and I expected them to be zero-extended to "000000001FFFFFFFFh".

For the first block I get mov rax, 1FFFFFFFFH ; 0004 _ 48: B8, 00000001FFFFFFFF and rax, 0FFFFFFFFFFFFFFFFH ; 000E _ 48: 25, FFFFFFFF or rax, 0FFFFFFFFFFFFFFFFH ; 0014 _ 48: 0D, FFFFFFFF xor rax, 0FFFFFFFFFFFFFFFFH ; 001A _ 48: 35, FFFFFFFF add rax, -1 ; 0020 _ 48: 05, FFFFFFFF adc rax, -1 ; 0026 _ 48: 15, FFFFFFFF sub rax, -1 ; 002C _ 48: 2D, FFFFFFFF sbb rax, -1 ; 0032 _ 48: 1D, FFFFFFFF cmp rax, -1 ; 0038 _ 48: 3D, FFFFFFFF imul rax, rax, -1 ; 003E _ 48: 6B. C0, FF test rax, 0FFFFFFFFFFFFFFFFH ; 0042 _ 48: A9, FFFFFFFF Which seems fine. The second bunch give: Error: bad type/size of operands Can you still reproduce the first failure?

(In reply to Joseph Cassman from comment #0) > For some reason the following code in an asm block compiles > > mov RAX,0x1ffffffffUL; That compiles correctly to: 48 B8 FF FF FF FF 01 00 00 00 mov RAX,01FFFFFFFFh The following: > and RAX,0xffffffffUL; > or RAX,0xffffffffUL; > xor RAX,0xffffffffUL; > add RAX,0xffffffffUL; > adc RAX,0xffffffffUL; > sub RAX,0xffffffffUL; > sbb RAX,0xffffffffUL; > cmp RAX,0xffffffffUL; > imul RAX,0xffffffffUL; > test RAX,0xffffffffUL; all correctly fail to compile with: Error: bad type/size of operands Because none of the instructions take 64 bit immediate operands.

(In reply to Joseph Cassman from comment #0) > However, the following code fails to compile. The problem occurs for all > generic registers (RAX .. RDX R8 .. R15). > > mul RAX,0xffffffffUL; > div RAX,0xffffffffUL; > idiv RAX,0xffffffffUL; > and RAX,0x1ffffffffUL; > or RAX,0x1ffffffffUL; > xor RAX,0x1ffffffffUL; > add RAX,0x1ffffffffUL; > adc RAX,0x1ffffffffUL; > sub RAX,0x1ffffffffUL; > sbb RAX,0x1ffffffffUL; > cmp RAX,0x1ffffffffUL; > mul RAX,0x1ffffffffUL; > imul RAX,0x1ffffffffUL; > div RAX,0x1ffffffffUL; > idiv RAX,0x1ffffffffUL; > test RAX,0x1ffffffffUL; These all correctly fail to compile, too. See: https://www.felixcloutier.com/x86/index.html for descriptions of which operands are acceptable for each opcode.