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Bug 12121 – atomicLoad!(MemoryOrder.acq) should not emit additional code on X86

Status
RESOLVED
Resolution
FIXED
Severity
normal
Priority
P2
Component
druntime
Product
D
Version
D2
Platform
All
OS
All
Creation time
2014-02-09T10:49:00Z
Last change time
2014-02-15T15:48:34Z
Assigned to
nobody
Creator
stanislav.blinov

Comments

Comment #0 by stanislav.blinov — 2014-02-09T10:49:48Z
Current implementation of needsLoadBarrier in core.atomic is as follows: template needsLoadBarrier( MemoryOrder ms ) { enum bool needsLoadBarrier = ms != MemoryOrder.raw; } On X86, acquire loads should not require fences, release-acquire ordering is automatic.
Comment #1 by code — 2014-02-12T18:10:50Z
As discussed here. http://forum.dlang.org/post/[email protected]
Comment #2 by code — 2014-02-12T18:12:03Z
https://github.com/D-Programming-Language/druntime/pull/723
Comment #3 by github-bugzilla — 2014-02-15T15:40:42Z
Commits pushed to master at https://github.com/D-Programming-Language/druntime https://github.com/D-Programming-Language/druntime/commit/391573925590cf042d1d10345b0ec39699ccd48a fix Issue 12121 - atomicLoad!(MemoryOrder.acq) doesn't require load barrier [Issue 12121 – atomicLoad!(MemoryOrder.acq) should not emit additional code on X86](https://d.puremagic.com/issues/show_bug.cgi?id=12121) https://github.com/D-Programming-Language/druntime/commit/9a8a09d6746181350021b06107515013ef2a25ce Merge pull request #723 from MartinNowak/fix12121 fix Issue 12121 - atomicLoad!(MemoryOrder.acq) doesn't require load barrier